1. Field of the Invention
The present invention relates to DC offset calibration technology, and more particularly, to a calibration apparatus and related method, which calibrates DC level of a signal through comparing said signal value and a predetermined threshold value.
2. Description of the Prior Art
Generally speaking, in order to adjust DC offsets resulted from channel effects, manufacturing process variations, power supply voltage variations, temperature variations, or other reasons so that the varying range of the received signals falls within a dynamic range of later-stage circuitry (such as an analog-to-digital converter) and signal distortion due to saturation can be avoided, a DC offset calibration mechanism is designed into receiving ends of communication systems or other systems having this need.
DC offset calibration apparatuses can be divided into two categories, which are on-line calibration and off-line calibration. The on-line DC offset calibration mechanism usually directly utilizes AC coupling to on-the-fly eliminate the DC offset of input signals or utilizes loop controls to eliminate the DC offset of the input signals by way of feedback. However, this mechanism will result in a slow response speed towards change in DC level of the input signals, mainly due to large time constant of resistor and capacitor components. On the other hand, the off-line DC offset calibration mechanism determines an adjustment amount for eliminating the DC offset in advance when the system is off-line, and utilizes the adjustment amount to eliminate the DC offset of the input signals when the system is on-line. However, just because the adjustment is determined off-line, it can hardly timely reflect the real-time change of the DC level of the input signals, so as to dynamically change the adjustment amount. Moreover, in practice the above-mentioned two mechanisms need to detect the DC offset of the input signals across a relatively long time period, in order to obtain a statistical average adjustment amount of the DC offset; hence, the DC offset calibration speed will become even slower. If convergence of a closed loop is further involved, the time required for detecting the DC offset of the input signals will become even lengthened.